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Barkhausen Institut

Scalable Computing Hardware

Die Gruppe Scalable Computing Hardware entwickelt ein skalierbares Multiprozessorsystem (Multiprocessor System-on-Chip, MPSoC), das eine sichere und energieeffiziente Datenverarbeitung für Anwendungen des Internet der Dinge (IoT) ermöglicht. Wir untersuchen Sicherheitskonzepte in MPSoC-Architekturen, um verschiedenartige parallel ausgeführte Applikationen voneinander zu isolieren und damit die Auswirkungen von Schadsoftware oder Applikationsfehlern zu minimieren. Die Prozessorplattform stellt die notwendigen Hardwarekomponenten für ein Mikrokern-basiertes Betriebssystem bereit, welches in enger Zusammenarbeit mit der Gruppe Modulare Betriebssysteme im Forschungsthema Modularisierung von Hard- und Software integriert wird. Die Realisierung des MPSoC erfolgt als FPGA-Implementierung und als Forschungschip in Siliziumtechnologie.

Unser Team

Sebastian Haas
Dr.-Ing.Sebastian HaasAssociate Group Leader
Mattis Hasler
Dr.-Ing.Mattis HaslerAssociate Group Leader
Friedrich Pauls
Dr.-Ing.Friedrich PaulsAssociate Group Leader
Michael Raitza
Dr.-Ing.Michael RaitzaSenior Researcher
Christopher Dunkel
M. Sc.Christopher DunkelASSOCIATE RESEARCHER
Yogesh Verma
M. Tech.Yogesh VermaAssociate Researcher
Mohd Danish Khursheed
Mohd Danish KhursheedStudent Assistant

Publikationen

Sebastian Haas, Christopher Dunkel, Friedrich Pauls, Mattis Hasler, Yogesh Verma, Trustworthy Silicon: An MPSoC for a Secure Operating System, 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

@inproceedings{
masur23NorCAS24,
title = "Trustworthy Silicon: An MPSoC for a Secure Operating System",
author = "Sebastian Haas, Christopher Dunkel, Friedrich Pauls, Mattis Hasler, Yogesh Verma",
year = "2024",
booktitle = "2024 IEEE Nordic Circuits and Systems Conference (NorCAS)",
pages = "1-7",
doi = "10.1109/NorCAS64408.2024.10752473"
}
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Sebastian Ertel, Max Kurze, Michael Raitza, On the Potential of Coq as the Platform of Choice for Hardware Design, Coq Workshop, 2024

@inproceedings{
ertelCOQ2024,
title = "On the Potential of Coq as the Platform of Choice for Hardware Design",
author = "Sebastian Ertel, Max Kurze, Michael Raitza",
year = "2024",
booktitle = "Coq Workshop",
url = "https://coq-workshop.gitlab.io/2024/files/EA4.pdf"
}
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Nilanjana Das, Mattis Hasler, Friedrich Pauls, Sebastian Haas, A Novel Multi-Dimensional Hardware Trojan Design Platform to Enhance Hardware Security, IEEE Embedded System Letters, 2024

@article{
DasESL24,
title = "A Novel Multi-Dimensional Hardware Trojan Design Platform to Enhance Hardware Security",
author = "Nilanjana Das, Mattis Hasler, Friedrich Pauls, Sebastian Haas",
year = "2024",
journal = "IEEE Embedded System Letters",
month = "August",
doi = "10.1109/LES.2024.3436701"
}
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Nilanjana Das, Friedrich Pauls, Mattis Hasler, Sebastian Haas, Nils Asmussen, Hardware Attack Models in the Tiled Chip Multi-Core Processor: A Survey, 2024 IEEE 17th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 2024

@inproceedings{
DasMCSoC24,
title = "Hardware Attack Models in the Tiled Chip Multi-Core Processor: A Survey",
author = "Nilanjana Das, Friedrich Pauls, Mattis Hasler, Sebastian Haas, Nils Asmussen",
year = "2024",
booktitle = "2024 IEEE 17th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)"
}
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Friedrich Pauls, Sebastian Haas, Yogesh Verma, Integration of IP-Cores for the M³ Architecture with Low Area Overhead: Accelerator Support Module, 2024 21th International SoC Design Conference (ISOCC), 2024

@inproceedings{
paulsISOCC24,
title = "Integration of IP-Cores for the M³ Architecture with Low Area Overhead: Accelerator Support Module",
author = "Friedrich Pauls, Sebastian Haas, Yogesh Verma",
year = "2024",
booktitle = "2024 21th International SoC Design Conference (ISOCC)",
pages = "340-341",
doi = "10.1109/ISOCC62682.2024.10762360"
}
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Nils Asmussen, Sebastian Haas, Adam Lackorzyński, Michael Roitzsch, Core-Local Reasoning and Predictable Cross-Core Communication with M³, 30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2024 , Download PDF

@inproceedings{
Asmussen:Core-Local,
title = "Core-Local Reasoning and Predictable Cross-Core Communication with M³",
author = "Nils Asmussen, Sebastian Haas, Adam Lackorzyński, Michael Roitzsch",
year = "2024",
booktitle = "30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)",
address = "Hong Kong, China",
month = "May",
publisher = "IEEE",
url = "https://doi.org/10.1109/RTAS61025.2024.00024"
}
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Mattis Hasler, Hiding from Hardware Trojan Detectors by Avoiding Rare Events, 2023 30th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2023

@inproceedings{
hasler-icecs23,
title = "Hiding from Hardware Trojan Detectors by Avoiding Rare Events",
author = "Mattis Hasler",
year = "2023",
booktitle = "2023 30th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)",
month = "December",
pages = "1-4",
doi = "10.1109/ICECS58634.2023.10382775"
}
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Mattis Hasler, Sebastian Haas, Mitigating Message Passing Interference in Trusted Embedded Platforms, 2023 20th International SoC Design Conference (ISOCC), 2023

@inproceedings{
HaslerISOCC23,
title = "Mitigating Message Passing Interference in Trusted Embedded Platforms",
author = "Mattis Hasler, Sebastian Haas",
year = "2023",
booktitle = "2023 20th International SoC Design Conference (ISOCC)",
pages = "71-72",
doi = "10.1109/ISOCC59558.2023.10396003"
}
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Yogesh Verma, Mattis Hasler, Crosstalk-Based Hardware Trojan In Low Power Designs, 2023 20th International SoC Design Conference (ISOCC), 2023

@inproceedings{
VermaISOCC23,
title = "Crosstalk-Based Hardware Trojan In Low Power Designs",
author = "Yogesh Verma, Mattis Hasler",
year = "2023",
booktitle = "2023 20th International SoC Design Conference (ISOCC)",
pages = "51-52",
doi = "10.1109/ISOCC59558.2023.10396502"
}
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Nilanjana Das, Mattis Hasler, Sebastian Haas, Implicit Hardware Trojan: Principles and Enabling Methods, 2023 20th International SoC Design Conference (ISOCC), 2023

@inproceedings{
DasISOCC23,
title = "Implicit Hardware Trojan: Principles and Enabling Methods",
author = "Nilanjana Das, Mattis Hasler, Sebastian Haas",
year = "2023",
booktitle = "2023 20th International SoC Design Conference (ISOCC)",
pages = "55-56",
doi = "10.1109/ISOCC59558.2023.10396416"
}
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Friedrich Pauls, Sebastian Haas, Mattis Hasler, Trust-minimized Integration of Third-Party Intellectual Property Cores, 2023 20th International SoC Design Conference (ISOCC), 2023

@inproceedings{
PaulsISOCC23,
title = "Trust-minimized Integration of Third-Party Intellectual Property Cores",
author = "Friedrich Pauls, Sebastian Haas, Mattis Hasler",
year = "2023",
booktitle = "2023 20th International SoC Design Conference (ISOCC)",
pages = "53-54",
doi = "10.1109/ISOCC59558.2023.10396198"
}
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Mattis Hasler, RoadRunner: A Modularized Hardware Design Management and EDA Tool Runner, Second Workshop on Open-Source Computer Architecture Research (OSCAR), 2023

@conference{
rr_hasler23,
title = "RoadRunner: A Modularized Hardware Design Management and EDA Tool Runner",
author = "Mattis Hasler",
year = "2023",
booktitle = "Second Workshop on Open-Source Computer Architecture Research (OSCAR)",
month = "June",
year = "2023"
}
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Sebastian Haas, Nils Asmussen, A Trusted Communication Unit for Secure Tiled Hardware Architectures, 2022 29th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2022 , Download PDF

@inproceedings{
hwtcu-haas,
title = "A Trusted Communication Unit for Secure Tiled Hardware Architectures",
author = "Sebastian Haas, Nils Asmussen",
year = "2022",
booktitle = "2022 29th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)",
month = "October",
pages = "1-4"
}
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Sebastian Haas, Mattis Hasler, Friedrich Pauls, Stefan Köpsell, Nils Asmussen, Michael Roitzsch, Gerhard Fettweis, Trustworthy Computing for O-RAN: Security in a Latency-Sensitive Environment, 2nd Workshop On Architectural Evolution Toward 6G Networks - 6GARCH, 2022 , Download PDF

@inproceedings{
m3oran-haas,
title = "Trustworthy Computing for O-RAN: Security in a Latency-Sensitive Environment",
author = "Sebastian Haas, Mattis Hasler, Friedrich Pauls, Stefan Köpsell, Nils Asmussen, Michael Roitzsch, Gerhard Fettweis",
year = "2022",
booktitle = "2nd Workshop On Architectural Evolution Toward 6G Networks - 6GARCH",
month = "December",
pages = "1-6"
}
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Mattis Hasler, Sebastian Haas, Robert Wittig, Stefan Scholze, Andreas Dixius, Sebastian Höppner, Gerhard Fettweis, Christian Mayr, A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI, 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022 , Download PDF

@inproceedings{
haslerkachel1,
title = "A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI",
author = "Mattis Hasler, Sebastian Haas, Robert Wittig, Stefan Scholze, Andreas Dixius, Sebastian Höppner, Gerhard Fettweis, Christian Mayr",
year = "2022",
booktitle = "2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)",
month = "July",
pages = "217-222",
doi = "10.1109/ISVLSI54635.2022.00050"
}
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Friedrich Pauls, Sebastian Haas, Stefan Köpsell, Michael Roitzsch, Nils Asmussen, Gerhard Fettweis, On Trustworthy Scalable Hardware/Software Platform Design, Smart Systems Integration Conference and Exhibition (SSI), 2022 , Download PDF

@inproceedings{
hwswplatform_pauls2022,
title = "On Trustworthy Scalable Hardware/Software Platform Design",
author = "Friedrich Pauls, Sebastian Haas, Stefan Köpsell, Michael Roitzsch, Nils Asmussen, Gerhard Fettweis",
year = "2022",
booktitle = "Smart Systems Integration Conference and Exhibition (SSI)",
month = "April"
}
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Nils Asmussen, Sebastian Haas, Carsten Weinhold, Till Miemietz, Michael Roitzsch, Efficient and Scalable Core Multiplexing with M³v, ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2022 , Download PDF

@inproceedings{
Asmussen:M3v,
title = "Efficient and Scalable Core Multiplexing with M³v",
author = "Nils Asmussen, Sebastian Haas, Carsten Weinhold, Till Miemietz, Michael Roitzsch",
year = "2022",
booktitle = "ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)",
address = "Lausanne, Switzerland",
month = "February",
publisher = "ACM",
pages = "452–466",
url = "https://doi.org/10.1145/3503222.3507741"
}
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Sebastian Haas, Nils Asmussen, HW/SW Design Challenges for Secure Computing Platforms, HiPEAC CSW Autumn, 2021

@conference{
hipeac-csw-autumn21-bi,
title = "HW/SW Design Challenges for Secure Computing Platforms",
author = "Sebastian Haas, Nils Asmussen",
year = "2021",
booktitle = "HiPEAC CSW Autumn",
address = "Lyon, France",
month = "October",
note = "Presentation",
url = "https://www.youtube.com/watch?v=pn9mmnWfvQE"
}
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Gerhard Fettweis, Mattis Hasler, Robert Wittig, Emil Matus, Stefan Damjancevic, Sebastian Haas, Friedrich Pauls, Seungseok Nam, Nairuhi Grigoryan, A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel, 2019 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

@inproceedings{
9048785,
title = "A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel",
author = "Gerhard Fettweis, Mattis Hasler, Robert Wittig, Emil Matus, Stefan Damjancevic, Sebastian Haas, Friedrich Pauls, Seungseok Nam, Nairuhi Grigoryan",
year = "2019",
booktitle = "2019 53rd Asilomar Conference on Signals, Systems, and Computers",
pages = "896-900",
url = "https://ieeexplore.ieee.org/abstract/document/8920308",
doi = "10.1109/IEEECONF44664.2019.9048785"
}
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Gerhard Fettweis, Emil Matus, Robert Wittig, Mattis Hasler, Stefan Damjancevic, Seungseok Nam, Sebastian Haas, 5G-and-Beyond Scalable Machines, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC), 2019

@inproceedings{
8920308,
title = "5G-and-Beyond Scalable Machines",
author = "Gerhard Fettweis, Emil Matus, Robert Wittig, Mattis Hasler, Stefan Damjancevic, Seungseok Nam, Sebastian Haas",
year = "2019",
booktitle = "2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)",
pages = "105-109",
url = "https://ieeexplore.ieee.org/abstract/document/8920308",
doi = "10.1109/VLSI-SoC.2019.8920308"
}
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Friedrich Pauls, Robert Wittig, Gerhard Fettweis, A Latency-Optimized Hash-Based Digital Signature Accelerator for the Tactile Internet, Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

@inproceedings{
10.1007/978-3-030-27562-4_7,
title = "A Latency-Optimized Hash-Based Digital Signature Accelerator for the Tactile Internet",
author = "Friedrich Pauls, Robert Wittig, Gerhard Fettweis",
year = "2019",
booktitle = "Embedded Computer Systems: Architectures, Modeling, and Simulation",
publisher = "Springer International Publishing",
pages = "93-106"
}
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